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1/11 july 2001 n high speed : f max = 62mhz (typ.) at v cc = 6v n low power dissipation: i cc =4 m a(max.) at t a =25c n high noise immunity: v nih = v nil = 28 % v cc (min.) n symmetrical output impedance: |i oh | = i ol = 4ma (min) n balanced propagation delays: t plh @ t phl n wide operating voltage range: v cc (opr) = 2v to 6v n pin and function compatible with 74 series 164 description the m74hc164 is an high speed cmos 8 bit sipo shift register fabricated with silicon gate c 2 mos technology. the m74hc164 is an 8 bit shift register with serial data entry and an output from each of the eight stages. data is entered serially through one of two inputs (a or b), either of these inputs can be used as an active high enable for data entry through the other input. an unused input must be high, or both inputs connected together. each low-to-high transition on the clock inputs shifts data one place to the right and enters into qa the logic nand of the two data inputs (a x b ), the data that existed before the rising clock edge. a low level on the clear input overrides all other inputs and clears the register asynchronously, forcing all q outputs low. all inputs are equipped with protection circuits against static discharge and transient excess voltage. m74hc164 8 bit sipo shift register pin connection and iec logic symbols order codes package tube t & r dip M74HC164B1R sop m74hc164m1r m74hc164rm13tr tssop m74hc164ttr tssop dip sop
m74hc164 2/11 input and output equivalent circuit pin description truth table x : dont care qan - qgn : the level of qa - qg, respectively. before the most-recent transition of the clock logic diagram this logic diagram has not be used to estimate propagation delays pin no symbol name and function 1,2 a, b data inputs 3, 4, 5, 6, 10, 11, 12, 13 qa to qh outputs 8 clock clock input (low to high, edge triggered 9 clear master reset input 7 gnd ground (0v) 14 vcc positive supply voltage inputs outputs clear clock serial in qa qb ........... qh ab l x x x l l ........... l h x x no change h l x l qan ........... qgn h x l l qan ........... qgn h h h h qan ........... qgn
m74hc164 3/11 timing chart absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied (*) 500mw at 65 c; derate to 300mw by 10mw/ c from 65 c to 85 c symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma p d power dissipation 500(*) mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c
m74hc164 4/11 recommended operating conditions dc specifications symbol parameter value unit v cc supply voltage 2 to 6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c t r , t f input rise and fall time v cc = 2.0v 0 to 1000 ns v cc = 4.5v 0 to 500 ns v cc = 6.0v 0 to 400 ns symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 i o =-20 m a 1.9 2.0 1.9 1.9 v 4.5 i o =-20 m a 4.4 4.5 4.4 4.4 6.0 i o =-20 m a 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 i o =20 m a 0.0 0.1 0.1 0.1 v 4.5 i o =20 m a 0.0 0.1 0.1 0.1 6.0 i o =20 m a 0.0 0.1 0.1 0.1 4.5 i o =4.0 ma 0.17 0.26 0.33 0.40 6.0 i o =5.2 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i = v cc or gnd 0.1 1 1 m a i cc quiescent supply current 6.0 v i = v cc or gnd 44080 m a
m74hc164 5/11 ac electrical characteristics (c l = 50 pf, input t r = t f = 6ns) capacitive characteristics 1) c pd is defined as the value of the ics internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 30 75 95 110 ns 4.5 8151922 6.0 7131619 t plh t phl propagation delay time (clock - q) 2.0 57 160 200 240 ns 4.5 19 32 40 48 6.0 16 27 34 41 t plh t phl propagation delay time (clear - q) 2.0 60 175 220 265 ns 4.5 20 35 44 53 6.0 17 30 37 45 f max maximum clock frequency 2.0 6.2 18 5.0 4.2 mhz 4.5 31 53 25 21 6.0 37 62 30 25 t w(h) t w(l) minimum pulse width (clock) 2.0 24 75 95 110 ns 4.5 6151922 6.0 5131619 t w(l) minimum pulse width (clear ) 2.0 40 75 95 110 ns 4.5 10 15 19 22 6.0 9131619 t s minimum set-up time (a, b - ck) 2.0 16 50 65 75 ns 4.5 4101315 6.0 3 9 11 13 t h minimum hold time (a, b - clock) 2.0 5 5 5 ns 4.5 5 5 5 6.0 5 5 5 t rem minimum removal time 2.0 5 5 5 ns 4.5 5 5 5 6.0 5 5 5 symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 5.0 5101010pf c pd power dissipation capacitance (note 1) 5.0 99 pf
m74hc164 6/11 test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r t = z out of pulse generator (typically 50 w ) waveform 1: minimum pulse width (clear ), minimum removal time (clear to clock) (f=1mhz; 50% duty cycle)
m74hc164 7/11 waveform 2 : propagation delay times, minimum pulse width (clock), setup and hold time (a,b to clock) (f=1mhz; 50% duty cycle)
m74hc164 8/11 dim. mm. inch min. typ max. min. typ. max. a1 0.51 0.020 b 1.39 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 d 20 0.787 e 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 f 7.1 0.280 i 5.1 0.201 l 3.3 0.130 z 1.27 2.54 0.050 0.100 plastic dip-14 mechanical data p001a
m74hc164 9/11 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 8.55 8.75 0.336 0.344 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.68 0.026 s8 (max.) so-14 mechanical data po13g
m74hc164 10/11 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 80 8 l 0.45 0.60 0.75 0.018 0.024 0.030 tssop14 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080337d
m74hc164 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom ? http://www.st.com 11/11

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